In standard CMOS devices, polysilicon is typically the standard gate material. The technology of fabricating CMOS devices using polysilicon gates has been in a constant state of development, and is now widely used in the semiconductor industry. One advantage of using polysilicon gates is that they can sustain high temperatures. However, there are also some problems associated with using a polysilicon gate. For example, due to the poly-depletion effect and relative high electrical sheet resistance (approximately 150 Ohms/Sq.), polySi gates commonly used in CMOS devices are becoming a gating factor in chip performance for channel lengths of 0.1 micron and below. Another problem with polySi gates is that the dopant in the polySi gate, such as boron, can easily diffuse through the thin gate dielectric causing further degradation of the device performance.
In order to avoid the problems with polySi gates, it has been suggested to replace the polySi gate with a single metal. Metals with different workfunctions, one for pFETs and one for nFETs are required for CMOS technologies using a high k dielectric. Metal/high k dielectric stacks also have to be subjected to a high temperature (on the order of about 1000° C.) anneals required for the source/drain self-aligned implant activation. Gate stack reactions occur during this high temperature anneal limiting the choice of materials. For example, in gate stacks including W and a high k dielectric, SiO2 regrowth occurs at the interface limiting inversion layer scalability. See, for example, A. Callegari, et al. IEDM 2004, p. 825, S. Francisco Calif., Dec. 13-15, 2004.
Metal compounds may be more stable, but still have problems with targeting the right workfunction. For example, TaSiN has been proposed as a nFET candidate, but still there are some questions about its workfunction and mobility reduction is observed in nFET devices. Furthermore, it appears that the inversion thickness scability is somewhat limited using TaSiN.
In view of the above, there is a need for providing a new compound metal which is thermally stable on a gate stack including a high k dielectric. In particular, there is a need for providing a new compound metal useful in nFET devices.